Part I Introduction1 Introduction to Coupled Data Technologies (Ron Ho, Robert Drost)1.1 Life has been good 1.2 Faster computers tomorrow 1.2.1 The end of Moore’s Law 1.2.2 The arguments against–and for–multiple chips 1.3 Coupled data communication1.3.1 This book Part II Overview of 3D Technologies2 Power delivery, signaling and cooling for 2D and 3D integratedsystems (Muhannad Bakir, Gang Huang and Bing Dang)2.1 Introduction2.2 Evolution of conventional silicon ancillary technologies: A brief overview 2.3 Novel silicon ancillary technologies2.3.1 Optical I/Os2.3.2 Fluidic I/Os for single and 3D chips2.4 Power delivery for 2D and 3D systems 2.4.1 Power delivery and design implications of 2D systems2.4.2 Power delivery and design implications of 3D systems3 Capacitive Coupled Communication(David Hopkins, Alex Chow, Frankie Liu, Dinesh D. Patil, Hans Eberle)3.1 Introduction 3.2 An electrical model of capacitive interchip communication 3.2.1 Crosstalk mitigation3.2.2 Simulation results3.3 Transmitting data3.4 Receiving data3.4.1 Attenuation 3.4.2 Loss of DC information 3.4.3 Comparators3.4.4 Receiver sizing 3.4.5 Timing schemes3.5 Two-dimensional arrays3.6 Measurement results3.6.1 Voltage waterfall3.6.2 Timing waterfall 3.6.3 Combined eye diagram 3.6.4 BER versus chip separation3.7 Prototype application: a high-radix switch4 Inductive Coupled Communications (Noriyuki Miura, Takayasu Sakurai, and Tadahiro Kuroda)4.1 Introduction 4.2 Inductive-coupling channel 4.2.1 Overview of channel characteristics4.2.2 Range extendability4.2.3 Coupling strength through Si substrate4.2.4 Crosstalk4.3 Inductive-coupling transceiver4.3.1 Signaling4.3.2 Coil design 4.3.3 Transceiver circuit design 4.3.4 Inter-chip communications4.4 Power reduction techniques4.4.1 Pulse shaping4.4.2 Daisy chain transmitter4.5 High-speed techniques4.5.1 Asynchronous transceiver4.5.2 Burst transmission 4.6 Crosstalk reduction techniques 4.6.1 Time interleaving4.7.1 Homogenous chip stacking4.7.2 Inductive-coupling up/down repeater4.7.3 Test chip measurement 4.8 Application II: processor and memory stacking 4.8.1 Heterogenous chip stacking 4.8.2 Interface design 4.8.3 Test chip measurement4.9 Conclusion5 Use of AC Coupled Interconnect in Contactless Packaging(Paul Franzon)5.1 Introduction: Why use ACCI?5.1.1 Chapter outline 5.2 Historical Perspectives5.3 Capacitively Coupled Chip I/O 5.3.1 Capacitively Coupled Channel Design5.3.2 ACCI Circuits5.3.3 ACCI Packaging 5.4 Mid-channel Capacitively Coupled Structures5.5 Inductively Coupled Connectors and Sockets 5.6 Conclusions and Future Perspectives
Part IV Enabling Coupled Data Technologies6 Aligning chips face-to-face for dense capacitive communication(John E. Cunningham, Ashok V. Krishnamoorthy, Ivan Shubin, JamesG. Mitchell, Xuezhe Zheng)6.1 Introduction6.2 Aligning chips face-to-face6.2.1 Power and ground connections between coupled chips6.3 A low-cost package for capacitive proximity communication 6.4 Array packages using bridge chips
Part V Extending Data Coupling Technologies7 Delivering On-chip Bandwidth Off-chip and Out-of-box withProximity and Optical Communication Ashok V. Krishnamoorthy, Jon Lexau, Xuezhe Zheng, John E.Cunningham7.1 Introduction7.2 Photonics as a long-reach interconnect4.6.2 Differential coil4.7 Application I: memory stacking7.5 Test chip results7.6 Conclusion 8 AC Coupled Wireless Power Delivery(Makoto Takamiya, Kohei Onizuka, and Takayasu Sakurai)8.1 Three dimensional stacked inter-chip wireless power delivery8.2 Prototype of wireless power transmission circuits8.3 Theoretical analysis and circuit improvementsThank you for visiting this site! If you like the post, please feel free to show your comments or be a member of this site by signing up in the left side of the content!!
