Design for Manufacturability and Yield for Nano-Scale CMOS
Written for:ASIC/ SOC designers, EDA R&D engineers, professors and graduate students Keywords:
-CAD (Computer aided design)
-CAE (Computer aided engineering)
-DFM (Design for manufacturability)
-DFY (Design for yield)
-SOC (System on a chip design) ES + RS + DF | PDF | 11.7MB